1. Field of the Invention
The present invention relates to a circuit for detecting power supply voltage drop, which detects a drop of a power supply voltage.
2. Description of the Related Art
In general, a semiconductor device is equipped with a circuit for detecting power supply voltage drop, which detects a drop of a power supply voltage. When the circuit for detecting power supply voltage drop detects that a power supply voltage becomes lower than a minimum operating voltage, the semiconductor device is prevented from malfunctioning by shutting down a malfunctioning circuit or all circuits other than the circuit for detecting power supply voltage drop.
A description is given of a minimum operating voltage of a semiconductor device.
FIG. 5 is a diagram illustrating an example of an element circuit. The circuit shown in FIG. 5 is a current mirror circuit of an NMOS-cascode type including NMOS transistors 31 to 34. The minimum operating voltage of this circuit is a sum voltage obtained by adding: the sum of the absolute value of the threshold voltage of the NMOS transistor 31 and the overdrive voltage thereof; and the sum of the absolute value of the threshold voltage of the NMOS transistor 32 and the overdrive voltage thereof.
FIG. 6 is a diagram illustrating an example of another element circuit. The circuit shown in FIG. 6 is a current mirror circuit of a PMOS-cascode type including PMOS transistors 41 to 44. The minimum operating voltage of this circuit is a sum voltage obtained by adding: the sum of the absolute value of the threshold voltage of the PMOS transistor 41 and the overdrive voltage thereof; and the sum of the absolute value of the threshold voltage of the PMOS transistor 42 and the overdrive voltage thereof.
FIG. 7 is a diagram illustrating an example of still another element circuit. The circuit shown in FIG. 7 is a constant current circuit including a PMOS transistor 51, PMOS transistors 55 and 56, an NMOS transistor 52, an NMOS transistor 54, and a resistor 53. When a signal for operating this circuit is input through a gate of the PMOS transistor 55 to turn on the PMOS transistor 55, this circuit is operated. The minimum operating voltage of this circuit is a voltage corresponding to higher one of the following two sum voltages. One sum voltage is obtained by adding: the sum of the absolute value of the threshold voltage of the NMOS transistor 52 and the overdrive voltage thereof; and the sum of the absolute value of the threshold voltage of the NMOS transistor 54 and the overdrive voltage thereof. The other sum voltage is obtained by adding: the sum of the absolute value of the threshold voltage of the PMOS transistor 55 and the overdrive voltage thereof; and the sum of the absolute value of the threshold voltage of the PMOS transistor 56 and the overdrive voltage thereof.
In general, the above-mentioned element circuit is frequently used in a semiconductor device. Therefore, the minimum operating voltage of the semiconductor device is a voltage corresponding to higher one of the following two sum voltages. One sum voltage is obtained by adding, in two NMOS transistors having the highest sum voltages in the semiconductor device: the sum of the absolute value of the threshold voltage of one NMOS transistor and the overdrive voltage thereof; and the sum of the absolute value of the threshold voltage of another NMOS transistor and the overdrive voltage thereof. The other sum voltage is obtained by adding, in two PMOS transistors having the highest sum voltages in the semiconductor device: the sum of the absolute value of the threshold voltage of one PMOS transistor and the overdrive voltage thereof; and the sum of the absolute value of the threshold voltage of another PMOS transistor and the overdrive voltage thereof.
A description is given of a conventional circuit for detecting power supply voltage drop. FIG. 8 is a diagram illustrating a conventional circuit for detecting power supply voltage drop.
The conventional circuit for detecting power supply voltage drop includes a reference voltage circuit 72 for generating a reference voltage, a voltage dividing circuit 73 for dividing a power supply voltage from a power supply 71 through resistors 75 and 76 to generate a divided voltage, a differential amplifier circuit 74 for comparing the divided voltage with the reference voltage to detect the drop of the power supply voltage, and a pull-up resistor 77 for pulling up an output terminal of the differential amplifier circuit 74 (for example, see JP 2005-278056 A).
However, in the circuit disclosed in JP 2005-278056 A, the reference voltage circuit, the voltage dividing circuit, and the differential amplifier circuit are necessary, which increases a circuit scale. As a result, a larger amount of current is consumed.